PiDP-8/I Software

Changes To A Field Guide to PDP-8 Assemblers
Log In

Changes to "A Field Guide to PDP-8 Assemblers" between 2018-01-27 14:54:26 and 2018-01-28 03:26:22

243
244
245
246
247
248
249

250


251




252































253
254
255
256
257
258
259
243
244
245
246
247
248
249
250

251
252
253
254
255
256
257

258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295







+
-
+
+

+
+
+
+
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+







RALF is the back-end assembler for OS/8's FORTRAN IV compiler. As a result of that support role, it has a few primary advantages over PAL8:

*   relocatable output code
*   easy access to the floating-point processor (FPP) peripherals for the PDP-8 family

The RALF assembler has a mode switch that causes it to generate absolute-addressed code, as PAL8 does. In this mode, it is called FLAP.

RALF has the following advantages over FLAP:
The FPP modes are the key advantage of RALF/FLAP. Vincent Slyngstad [suggests][smal8] that you think of these as assemblers for the FPP rather than for the PDP-8.

*   Relocatable code

The primary advantage FLAP has over RALF is that, because it is difficult to ascribe meaning to the "page" concept in a relocatable assembler, RALF doesn't support the `PAGE` pseudo-op, while FLAP does. FLAP also supports the PAL family's zero-page and current-page literal syntaxes, while RALF does not.

RALF and FLAP share many advantages over the PAL family assemblers.

The original FPP peripheral was the [FPP-12][fpp12]. Although it was introduced with the PDP-12, it is not restricted to the PDP-12: it also works with all of the other PDP-8 family computers contemporaneous with and preceding it, going back to the original PDP-8, because it is a bus peripheral rather than a feature of the CPU proper. There was also a follow-on peripheral for the PDP-8/a called the [FPP8-A][fpp8a], which is compatible with the FPP-12. The FPP features of RALF/FLAP facilitate use of these peripherals in programs you write in those assembly languages.
The main advantage is that these assemblers have direct support for the PDP-8 family Floating Point Processor peripherals. The first such peripheral was the [FPP-12][fpp12]. Although it was introduced with the PDP-12, it is not restricted to the PDP-12: it also works with all of the other PDP-8 family computers contemporaneous with and preceding it, going back to the original PDP-8, because it is a bus peripheral rather than a feature of the CPU proper. There was also a follow-on peripheral for the PDP-8/a called the [FPP8-A][fpp8a], which is compatible with the FPP-12. The FPP features of RALF/FLAP facilitate use of these peripherals in programs you write in those assembly languages. the FPP modes. Vincent Slyngstad [suggests][smal8] that you think of RALF and FLAP as assemblers for the FPP rather than for the PDP-8.

Although the basic statement syntax in RALF and FLAP is similar to that of the PAL family, these assemblers differ from PAL family assemblers in many ways:

*   Expressions:
    *   Multiplication is `*` rather than `^`, achieved by using the `ORG` pseudo-op to set the location counter
    *   Division is `/` rather than `%`, achieved by requiring whitespace before `/` used to start a comment and disallowing spaces in expressions
    *   There is no Boolean `AND` operator `&`
*   Added FPP instructions and FPP-related psuedo-ops:
    *   Arithmetic: `FADD`, `FADDM`, `FDIV`, `FLDA`, `FMUL`, `FMULM`, `FSTA`, `FSUB`
    *   Conditional jumps: `JEQ`, `JGE`, `JLE`, `JA`, `JNE`, `JGT`, `JAL`
    *   FPP to PDP-8 jumps: `JXN`, `TRAP3`, `TRAP4`
    *   Indexing: `ADDX`, `INDEX, `LDX`
    *   No-op: `NOP`
    *   Pointer moves: `JSA`, `JSR`, `SETB`, `SETX`
    *   Processor Operations: `FCLA`, `FEXIT`, `FNEG`, `FNORM`, `FPAUSE`, `JAC`, `STARTD`, `STARTF`
    *   Register manipulation: `ALN`, `ATX`, `XTA`
    *   Require double-precision hardware: `DPCHK`
*   Use 15-bit addresses directly in FPP instructions, rather than the [PDP-8's memory model][mm8]; `BASE` psuedo-op
*   Many new and changed pseudo-ops:
    *   `LISTOF` and `LISTON` to stop and start listing output rather than the PAL family's `XLIST` pseudo-op
    *   Conditional assembly additions relative to PAL8: `IFPOS`, `IFNEG`, `IFSW`, `IFNSW`, `IFFLAP`, `IFRALF`
    *   `IFREF` replaces `IFDEF` pseudo-op, having a superset of its functionality
    *   `REPEAT` pseudo-op to assemble the following line multiple times
    *   More ways to define constants of various sorts: , `ADDR`, `E`, `F`, `S`
    *   Pseudo-ops to support FORTRAN IV features: `COMMON`, `COMMZ`, `ENTRY`, `EXTERN`, `FIELD1`, `SECT`, `SECT8`
        *    `S n` — single-word constant with value `n` (FLAP only)
        *    `F n` — 3-word single FP constant with value `n`
        *    `E n` — 6-word extended-precision FP constant with value `n`

If you see any of the added instructions listed above in a given assembly language program, it's a pretty good indicator that it's meant to be assembled by RALF or FLAP.

**INCOMPLETE**

[fpp8a]: https://archive.org/details/bitsavers_decpdp8pdpUsersManDec76_996770
[fpp12]: https://archive.org/details/bitsavers_decpdp12DE_2606247