PiDP-8/I Software

Changes To PDP-8 Memory Addressing
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# Level 3: The Instruction and Data Field Registers

By this point, you'll be wondering how a PDP-8 can be expanded beyond its stock 4 kiW of core to its maximum of 32 kiW, and why is that the limit anyway?

The answer to both questions is that the PDP-8 has a pair of 3-bit registers for setting the instruction field and the data field. 2³ = 8, and 8 fields × 4 kiW = 32 kiW.

Thus, when a program is currently executing code in field 0 but wants to address data in field 1, it sets the data field (DF) register to 1 with a `CDF` instruction, and now all data fetches pull data from field 1. Likewise, to jump to an address in field 1 from field 0, it sets the instruction field (IF) register to 1 with a `CIF` instruction and jumps to an address in that field. (The IF register doesn't actually change until the `JMP` occurs.)
Thus, when a program is currently executing code in field 0 but wants to address data in field 1, it sets the data field (DF) register to 1 with a `CDF` instruction, and now all data fetches pull data from field 1. Likewise, to jump to an address in field 1 from field 0, it sets the instruction field (IF) register to 1 with a `CIF` instruction and jumps to an address in that field.

This is also why your PDP-8/I has two sets of 3 switches and associated indicator lights on its front panel labeled "Data Field" and "Inst Field." Together, this gives you a combined 15-bit extended address. A jump or fetch between fields thus takes two instructions, rather than the indirect addressing for in-field operations or the direct addressing of in-page operations. This gives a hierarchy of expense: a diligent PDP-8 programmer tries to keep data and instructions close together and logically bunched to avoid needless page and field transitions.


# Conclusion

I hope you've found this overview interesting and enlightening. If you would like more on this topic, the various versions of DEC's Small Computer Handbook for the PDP-8 cover this in more detail and take you beyond it, into actual programming of a PDP-8:
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3. Yes, "versions," plural. There were actually 3 major [versions of ASCII](https://en.wikipedia.org/wiki/ASCII#History), published in 1963, 1964, and 1967. Since the original PDP-8 came out in 1965 and the PDP-8/I model came out in 1968, you can see that the development of these computers coincided quite nicely with the development of ASCII itself. Thus, the PDP-8/I is one of the first machines that was aware from inception of what we now think of as 7-bit ASCII.

4. The most common terminal used with PDP-8s and other machines of its era was the Teletype Model 33 ASR, the "ASR" referring to the Asynchronous Send and Receive version of the Model 33. Although you will commonly see that terminal type referred to as an ASR-33, that is not its [proper](https://en.wikipedia.org/wiki/Teletype_Model_33#Model_33_ASR_vis-.C3.A0-vis_ASR-33) name.

    As for my "wildly popular" characterization, they sold over half a million of them by the mid 1970s. Such success wouldn't be exceeded by a computer product until the first consumer-friendly microcomputers came out.

5. Pro tip: every time the third digit from the right side of an octal address goes up by 2, it is referring to a different PDP-8 page: page 1 begins at address 200₈, page 2 begins at address 400₈, etc. This is because 200₈ = 128₁₀ = 2⁷.

6. The IF register doesn't actually change until the processor encounters a `JMP` or `JMS` instruction. Then the address being jumped to is computed based on the new IF value, transferring execution out of the current field.

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## License

Copyright © 2017 by Warren Young. This document is licensed under the terms of [the SIMH license][sl].

[sl]:   https://tangentsoft.com/pidp8i/doc/trunk/SIMH-LICENSE.md