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# Level 3: The Instruction and Data Field Registers
By this point, you'll be wondering how a PDP-8 can be expanded beyond its stock 4 kiW of core to its maximum of 32 kiW, and why is that the limit anyway?
The answer to both questions is that the PDP-8 has a pair of 3-bit registers for setting the instruction field and the data field. 2³ = 8, and 8 fields × 4 kiW = 32 kiW.
Thus, when a program is currently executing code in field 0 but wants to address data in field 1, it sets the data field (DF) register to 1, and now all data fetches pull data from field 1. Likewise, to jump to an address in field 1 from field 0, it sets the instruction field (IF) register to 1.
Thus, when a program is currently executing code in field 0 but wants to address data in field 1, it sets the data field (DF) register to 1 with a `CDF` instruction, and now all data fetches pull data from field 1. Likewise, to jump to an address in field 1 from field 0, it sets the instruction field (IF) register to 1 with a `CIF` instruction and jumps to an address in that field. (The IF doesn't actually change until the `JMP` occurs.)
This is also why your PDP-8/I has two sets of 3 switches associated indicator lights on its front panel labeled "Data Field" and "Inst Field." Together, this gives you a combined 15-bit extended address. A jump or fetch between fields thus takes two instructions, rather than the indirect addressing for in-field operations or the direct addressing of in-page operations. This gives a hierarchy of expense: a diligent PDP-8 programmer tries to keep data and instructions close together and logically bunched to avoid needless page and field transitions.
# Conclusion
I hope you've found this overview interesting and enlightening. If you would like more on this topic, the various versions of DEC's Small Computer Handbook for the PDP-8 cover this in more detail and take you beyond it, into actual programming of a PDP-8:
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